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Si 11 4 1 / 4 2 /43
PR O X I M I T Y /A M BI E N T L I G H T S E N S O R I C WI T H I 2 C I N T E R F A C E
Features Pin Assignments
QuickSenseTM integrated infrared proximity detector Proximity detection adjustable from under 1 cm to over 1 m Three independent LED drivers 15 current settings from 5.6 mA to 360 mA for each LED driver 25.6 s LED driver pulse width 500 mm proximity range with single pulse (<2.5 klx) 150 mm proximity range with single pulse (>2.5 klx) Operates at up to 128 klx (direct sunlight) Minimum reflectance sensitivity < 1 W/cm2 High EMI immunity without shielded packaging QuickSenseTM integrated ambient light sensor 10 mlx resolution possible, allowing operation under dark glass 1 to 128 klx dynamic range possible across two ADC range settings 17-bit resolution
lux measurements possible with IR correction algorithm 25.6 s measurement cycle keeps total power consumption duty cycle low without compromising performance or noise immunity Industry's lowest power consumption 1.8 to 3.6 V supply voltage 9 A average current (LED pulsed 25.6 s every 800 ms at 180 mA plus 3 A Si114x supply) < 500 nA standby current Internal and external wake support Built-in voltage supply monitor and power-on reset controller Serial communications Up to 3.4 Mbps data rate Slave mode hardware address decoding Small-outline 10-lead 2x2 mm QFN Temperature Range -40 to +85 C
Accurate
DNC SDA SCL VDD INT 1 2 3 4 10 9 8 7 6 LED1 GND LED3 LED2
QFN-10
5 NC
Applications

Handsets E-book readers Notebooks/Netbooks Portable consumer electronics Audio products Security panels Tamper detection circuits Dispensers

Valve controls Smoke detectors Touchless switches Touchless sliders Occupancy sensors Consumer electronics Industrial automation Display backlighting control Photo-interrupters
Description
The SI1141/42/43 is a low-power, reflectance-based, infrared proximity and ambient light sensor with I2C digital interface and programmable-event interrupt output. This touchless sensor IC includes an analog-to-digital converter, integrated highsensitivity visible and infrared photodiodes, digital signal processor, and one, two, or three integrated infrared LED drivers with fifteen selectable drive levels. The SI1141/ 42/43 offers excellent performance under a wide dynamic range and a variety of light sources including direct sunlight. The SI1141/42/43 can also work under dark glass covers. The photodiode response and associated digital conversion circuitry provide excellent immunity to artificial light flicker noise and natural light flutter noise. With two or more LEDs, the Si1142/43 is capable of supporting multiple-axis proximity motion detection. The SI1141/42/43 devices are provided in a 10-lead 2x2 mm QFN package and are capable of operation from 1.8 to 3.6 V over the -40 to +85 C temperature range.
Preliminary Rev. 0.5 1/11
Copyright (c) 2011 by Silicon Laboratories
SI1141/42/43
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
SI1141/42/43
Functional Block Diagram
VDD
Regulator Temp A M U X LED Drivers ADC Filter
LED1 LED2 1 LED3 2
Visible
INT SCL SDA
Infrared
Digital Sequencer & Control Logic
I2C
Registers
Oscillator
GND
1. Si1142 and Si1143 only. 2. Si1143 only.
3.3 V
30 ohm 5%, 1/16 W Host SDA SCL SI1141 SDA SCL VDD INT 0.1 uF INT LED1 GND CVDD CVDD 15 F, 20%, >6 V
Figure 1. SI1141 Basic Application
3.3 V 4.3 V
No Pop Host Si1143 SDA SCL VDD INT 0.1 uF LED1 GND LED3 LED2
30 ohm 5%, 1/16 W
22 uF, 20%, >6V
Figure 2. Si1143 Application with Three LEDs and Separate LED Power Supply
Note: For more application examples, refer to "AN498: irLED Selection Guide for Si114x Proximity Applications".
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SI1141/42/43 TABLE O F CONTENTS
Section Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.2. Proximity Sensing (PS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.3. Ambient Light . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 2.4. Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3. Operational Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1. Off Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2. Initialization Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3. Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4. Forced Conversion Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 3.5. Autonomous Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 4. Programming Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1. Command and Response Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2. Command Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3. Resource Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.4. Signal Path Software Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.5. I2C Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 4.6. Parameter RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 7. Package Outline: 10-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
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1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter VDD Supply Voltage VDD OFF Supply Voltage VDD Supply Ripple Voltage Operating Temperature SCL, SDA, Input High Logic Voltage SCL, SDA Input Low Logic Voltage PS Operation under Direct Sunlight IrLED Emission Wavelength IrLED Supply Voltage T I2CVIH I2CVIL Edc l VLED IrLED VF = 1.0 V nominal Applies if IrLEDs use separate supply rail 0-30 kHz 30 kHz-100 MHz VDD above 1.8 V Start-up Symbol VDD VDD_OFF Conditions includes ripple OFF mode VDD = 3.3 V 1 kHz-10 MHz Min 1.8 -0.3 -- -40 VDDx0.7 0 -- 750 VDD 50 25 -- -- -- 850 -- Typ 3.3 Max 3.6 1.0 TBD 85 VDD VDDx0.3 128 950 4.3 Units V V mVpp C V V klx nm V
IrLED Supply Ripple Voltage
-- -- 20 VDDx0.77
250 100 -- --
TBD TBD -- --
mVpp mVpp ms V
Start-Up Time LED3 Voltage
Table 2. Absolute Maximum Ratings
Parameter VDD Supply Voltage Operating Temperature Storage Temperature LED1, LED2, LED3 Voltage INT, SCL, SDA Voltage Maximum total current through LED1, LED2 and LED3 Maximum total current through GND ESD Rating Human Body Model at VDD = 0 V, TA < 85 C at VDD = 0 V, TA < 85 C Conditions Min -0.3 -40 -65 -0.5 -0.5 -- -- -- Typ -- -- -- -- -- -- -- -- Max 4 85 85 3.6 3.6 500 600 2 Units V C C V V mA mA kV
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Table 3. Performance Characteristics1
Parameter IDD OFF Mode Symbol Ioff Conditions VDD < VDD_OFF (leakage from SCL, SDA, and INT not included) No ALS / PS Conversions No I2C Activity after t > TBD s, VDD = 1.8 V No ALS / PS Conversions No I2C Activity after t > TBD s, VDD =3.3 V Without LED influence, VDD = 3.3 V VDD = 3.3 V 1.8< VDD<2.4, ILEDx<100 mA 1.8IDD Standby Mode
Isb
--
150
500
nA
IDD Standby Mode IDD Actively Measuring Peak IDD while LED1, LED2, or LED3 is Actively Driven LED1, LED2, LED3, Saturation Voltage2 LED1, LED2, LED3 Pulse Width LED1, LED2, LED3 Leakage Current
Isb Iactive
-- -- -- -- -- -- -- -- -- --
1.83 4.3 8 0.3 0.5 0.3 0.5 25.6 .01 1.0
-- 5.2 -- -- -- -- -- 30 5.0 5.0
A mA mA
V
s A
Notes: 1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx. 2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply and voltage drop allow the driver to saturate and current regulation is lost. 3. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes. Assumes default settings. 4. Applies to single 25.6 s pulse measurement. By increasing irLED pulse width, 0.001 W/cm2 under low light is possible. 5. ALS Sensitivity under low light conditions can be improved by increasing ADC integration time. 10 mlx resolution possible under the highest ADC integration time setting.
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Table 3. Performance Characteristics1 (Continued)
Parameter Symbol Conditions VDD = 3.3 V, single drive VLEDn = 1 V, PS_LEDn = 0001 VLEDn = 1 V, PS_LEDn = 0010 VLEDn = 1 V, PS_LEDn = 0011 VLEDn = 1 V, PS_LEDn = 0100 VLEDn = 1 V, PS_LEDn = 0101 VLEDn = 1 V, PS_LEDn = 0110 VLEDn = 1 V, PS_LEDn = 0111 VLEDn = 1 V, PS_LEDn = 1000 VLEDn = 1 V, PS_LEDn = 1001 VLEDn = 1 V, PS_LEDn = 1010 VLEDn = 1 V, PS_LEDn = 1011 VLEDn = 1 V, PS_LEDn = 1100 VLEDn = 1 V, PS_LEDn = 1101 VLEDn = 1 V, PS_LEDn = 1110 VLEDn = 1 V, PS_LEDn = 1111 Single PS ALS VIS + ALS IR Two ALS plus three PS EMIN EMAX VDD = 3.3 V = 850 nm VDD = 3.3 V = 850 nm Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 25 10m VDD = 3.3 V VOL I = 4 mA, VDD > 2.0 V I = 4 mA, VDD < 2.0 V -- -- -- Typ 5.6 11.2 22.4 45 67 90 112 135 157 180 202 224 269 314 359 155 285 660 0.1 -- -- 5 -- -- Max TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD 1 -- 128k -- VDDx0.2 0.4 Units
LED1, LED2, LED3 Active Current
ILEDx
mA
Actively Measuring Time3
s s s W/ cm2 mW/ cm2 lx % V V
PS Min Detectable Reflectance Input4 PS Max Detectable Reflectance Input ALS Range5 ALS Flicker Noise Error SCL, SDA, INT Output Low Voltage
Notes: 1. Unless specifically stated in "Conditions", electrical data assumes ambient light levels < 1 klx. 2. Proximity-detection performance may be degraded, especially when there is high optical crosstalk, if the LED supply and voltage drop allow the driver to saturate and current regulation is lost. 3. Represents the time during which the device is drawing a current equal to Iactive for power estimation purposes. Assumes default settings. 4. Applies to single 25.6 s pulse measurement. By increasing irLED pulse width, 0.001 W/cm2 under low light is possible. 5. ALS Sensitivity under low light conditions can be improved by increasing ADC integration time. 10 mlx resolution possible under the highest ADC integration time setting.
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Table 4. I2C Timing Specifications
Parameter Clock Frequency Clock Pulse Width Low Clock Pulse Width High Rise Time Fall Time Start Condition Hold Time Start Condition Setup Time Input Data Setup Time Input Data Hold Time Stop Condition Setup Time Symbol fSCL tLOW tHIGH tR tF tHD.STA tSU.STA tSU.DAT tHD.DAT tSU.STO Min -- 160 60 10 10 160 160 10 0 160 Typ -- -- -- -- -- -- -- -- -- -- Max 3.4 -- -- 40 40 -- -- -- -- -- Unit MHz ns ns ns ns ns ns ns ns ns
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SI1141/42/43
2. Functional Description
2.1. Introduction
The SI1141/42/43 is an active optical reflectance proximity detector and ambient light sensor whose operational state is controlled through registers accessible through the I2C interface. The host can command the SI1141/42/43 to initiate on-demand proximity detection or ambient light sensing. The host can also place the SI1141/42/43 in an autonomous operational state where it performs measurements at set intervals and interrupts the host either after each measurement is completed or whenever a set threshold has been crossed. This results in an overall system power saving allowing the host controller to operate longer in its sleep state instead of polling the SI1141/42/43. For more details, refer to "AN498: Designer's Guide for the Si114x".
2.2. Proximity Sensing (PS)
The SI1141/42/43 has been optimized for use as either a dual-port or single-port active reflection proximity detector. Over distances of less than 50 cm, the dual-port active reflection proximity detector has significant advantages over single-port, motion-based infrared systems, which are only good for triggered events. Motionbased infrared detectors identify objects within proximity, but only if they are moving. Single-port motion-based infrared systems are ambiguous about stationary objects even if they are within the proximity field. The SI1141/42/ 43 can reliably detect an object entering or exiting a specified proximity field, even if the object is not moving or is moving very slowly. However, beyond about 30-50 cm, even with good optical isolation, single-port signal processing may be required due to static reflections from nearby objects, such as table tops, walls, etc. If motion detection is acceptable, the SI1141/42/43 can achieve ranges of up to 50 cm, through a single product window. For small objects, the drop in reflectance is as much as the fourth power of the distance. This means that there is less range ambiguity than with passive motion-based devices. For example, a sixteenfold change in an object's reflectance means only a fifty-percent drop in detection range. The SI1141/42/43 can drive three separate infrared LEDs. When the three infrared LEDs are placed in an L-shaped configuration, it is possible to triangulate an object within the three-dimensional proximity field. Thus, a touchless user interface can be implemented with the aid of host software. The SI1141/42/43 can initiate proximity sense measurements when explicitly commanded by the host or periodically through an autonomous process. Refer to "3. Operational Modes" on page 14 for additional details of the SI1141/42/43's Operational Modes. Whenever it is time to make a PS measurement, the SI1141/42/43 makes up to three measurements, depending on what is enabled in the CHLIST parameter. Other ADC parameters for these measurements can also be modified to allow proper operation under different ambient light conditions. The LED choice is programmable for each of these three measurements. By default, each measurement turns on a single LED driver. However, the order of measurements can be easily reversed or even have all LEDs turned on at the same time. Optionally, each proximity measurement can be compared against a host-programmable threshold. With threshold settings for each PS channel, it is also possible for the SI1141/42/43 to notify the host whenever the threshold has been crossed. This reduces the number of interrupts to the host, aiding in efficient software algorithms. The SI1141/42/43 can also generate an interrupt after a complete set of proximity measurements, ignoring any threshold settings. To support different power usage cases dynamically, the infrared LED current of each output is independently programmable. The current can be programmed anywhere from a few to several hundred milliamps. Therefore, the host can optimize for proximity detection performance or for power saving dynamically. This feature can be useful since it allows the host to reduce the LED current once an object has entered a proximity sphere, and the object can still be tracked at a lower current setting. Finally, the flexible current settings make it possible to control the infrared LED currents with a controlled current sink, resulting in higher precision. The ADC properties are programmable. For indoor operation, the ADC should be configured for low signal range for best reflectance sensitivity. When under high ambient conditions, the ADC should be configured for high signal level range operation.
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When operating in the lower signal range, it is possible to saturate the ADC when the ambient light level is high. Any overflow condition is reported in the RESPONSE register, and the corresponding data registers report a value of 0xFFFF. The host can then adjust the ADC sensitivity. Note however that the overflow condition is not sticky. If the light levels return to a range within the capabilities of the ADC, the corresponding data registers begin to operate normally. However, the RESPONSE register will continue to hold the overflow condition until a NOP command is received. Even if the RESPONSE register has an overflow condition, commands are still accepted and processed. Proximity detection ranges beyond 50 cm and up to several meters can be achieved without lensing by selecting a longer integration time. The detection range may be increased further, even with high ambient light, by averaging multiple measurements. Refer to "AN498: Designer's Guide for the Si114x" for more details.
50
45
40
47%, Hand, 1 Lux 47%, Hand, 300 Lux Fluorescent 47%, Hand, 300 Lux Incandescent
35
Distance (cm)
30
18% Gray Card, 1 Lux 92% White Card, 1 Lux
25
20
15
10
5 0 5000 10000 15000 PSLEDx_DATA 20000 25000 30000
25 23
47%, Hand, 1 Lux
21 19 17 15 13 11 9 7 5 0 500 1000 1500
47%, Hand, 300 Lux Fluorescent 47%, Hand, 300 Lux Incandescent 18% Gray Card, 1 Lux 92% White Card, 1 Lux
Distance (cm)
2000 2500 PSLEDx_DATA
3000
3500
4000
4500
Figure 3. Typical Proximity Sense Performance Curves
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2.3. Ambient Light
The SI1141/42/43 has photodiodes capable of measuring both visible and infrared light. However, the visible photodiode is also influenced by infrared light. The measurement of illuminance requires the same spectral response as the human eye. If an accurate lux measurement is desired, the extra IR response of the visible-light photodiode must be compensated. Therefore, to allow the host to make corrections to the infrared light's influence, the SI1141/42/43 reports the infrared light measurement on a separate channel. The separate visible and IR photodiodes lend themselves to a variety of algorithmic solutions. The host can then take these two measurements and run an algorithm to derive an equivalent lux level as perceived by a human eye. Having the IR correction algorithm running in the host allows for the most flexibility in adjusting for system-dependent variables. For example, if the glass used in the system blocks visible light more than infrared light, the IR correction needs to be adjusted. If the host is not making any infrared corrections, the infrared measurement can be turned off in the CHLIST parameter. By default, the measurement parameters are optimized for indoor ambient light levels where it is possible to detect light levels as low as 6 lx. For operation under direct sunlight, the ADC can be programmed to operate in a high signal operation so that it is possible to measure direct sunlight without overflowing the 16-bit result. For low-light applications, it is possible to increase the ADC integration time. Normally, the integration time is 25.6 s. By increasing this integration time to 410 s, the ADC can detect light levels as low as 1 lx. The ADC can be programmed with an integration time as high as 52.4 ms, allowing measurement to 10 mlx light levels. The ADC integration time for the Visible Light Ambient measurement can be programmed independently of the ADC integration time of the Infrared Light Ambient measurement. The independent ADC parameters allow operation under glass covers having a higher transmittance to Infrared Light than Visible Light. When operating in the lower signal range, or when the integration time is increased, it is possible to saturate the ADC when the ambient light suddenly increases. Any overflow condition is reported in the RESPONSE register, and the corresponding data registers report a value of 0xFFFF. Based on either of these two overflow indicators, the host can adjust the ADC sensitivity. However, the overflow condition is not sticky. If the light levels return to a range within the capabilities of the ADC, the corresponding data registers begin to operate normally. The RESPONSE register will continue to hold the overflow condition until a NOP command is received. Even if the RESPONSE register has an overflow condition, commands are still accepted and processed. The SI1141/42/43 can initiate ALS measurements either when explicitly commanded by the host or periodically through an autonomous process. Refer to "3. Operational Modes" on page 14 for additional details of the SI1141/ 42/43's Operational Modes. The conversion frequency setting is programmable and independent of the Proximity Sensor. This allows the Proximity Sensor and Ambient Light sensor to operate at different conversion rates, increasing host control over the SI1141/42/43. When operating autonomously, the ALS has a slightly different interrupt structure compared to the Proximity Sensor. An interrupt can be generated to the host on every sample, or when the ambient light has changed. The "Ambient Light Changed" interrupt is accomplished through two thresholds working together to implement a window. As long as the ambient light stays within the window defined by the two thresholds, the host is not interrupted. When the ambient light changes and either threshold is crossed, an interrupt is sent to the host, thereby allowing the host notification that the ambient light has changed. This can be used by the host to trigger a recalculation of the lux values. The window can be applied to either the Visible Ambient Measurement, or the Infrared Ambient Measurement, but not both. However, monitoring the ambient change in either channel should allow notification that the ambient light level has changed.
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Figure 4. Typical Ambient Light Sense Performance Curves (Preliminary)
2.4. Host Interface
The host interface to the SI1141/42/43 consists of three pins: SCL SDA INT SCL and SDA are standard open-drain pins as required for I2C operation. The SI1141/42/43 asserts the INT pin to interrupt the host processor. The INT pin is an open-drain output. A pull-up resistor is needed for proper operation. As an open-drain output, it can be shared with other open-drain interrupt sources in the system. For proper operation, the SI1141/42/43 is expected to fully complete its Initialization Mode prior to any activity on the I2C. The INT, SCL, and SDA pins are designed so that it is possible for the SI1141/42/43 to enter the Off Mode by software command without interfering with normal operation of other I2C devices on the bus. The SI1141/42/43 I2C slave address is 0x5A. The SI1141/42/43 also responds to the global address (0x00) and the global reset command (0x06). Only 7-bit I2C addressing is supported; 10-bit I2C addressing is not supported. Conceptually, the I2C interface allows access to the SI1141/42/43 internal registers. Table 15 on page 25 is a summary of these registers. An I2C write access always begins with a start (or restart) condition. The first byte after the start condition is the I2C address and a read-write bit. The second byte specifies the starting address of the SI1141/42/43 internal register. Subsequent bytes are written to the SI1141/42/43 internal register sequentially until a stop condition is encountered. An I2C write access with only two bytes is typically used to set up the SI1141/42/43 internal address in preparation for an I2C read. The I2C read access, like the I2C write access, begins with a start or restart condition. In an I2C read, the I2C
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master then continues to clock SCK to allow the SI1141/42/43 to drive the I2C with the internal register contents. The SI1141/42/43 also supports burst reads and burst writes. The burst read is useful in collecting contiguous, sequential registers. The SI1141/42/43 register map was designed to optimize for burst reads for interrupt handlers, and the burst writes are designed to facilitate rapid programming of commonly used fields, such as thresholds registers. The internal register address is a six-bit (bit 5 to bit 0) plus an Autoincrement Disable (on bit 6). The Autoincrement Disable is turned off by default. Disabling the autoincrementing feature allows the host to poll any single internal register repeatedly without having to keep updating the SI1141/42/43 internal address every time the register is read. It is recommended that the host should read PS or ALS measurements (in the I2C Register Map) when the SI1141/ 42/43 asserts INT. Although the host can read any of the SI1141/42/43's I2C registers at any time, care must be taken when reading 2-byte measurements outside the context of an interrupt handler. The host could be reading part of the 2-byte measurement when the internal sequencer is updating that same measurement coincidentally. When this happens, the host could be reading a hybrid 2-byte quantity whose high byte and low byte are parts of different samples. If the host must read these 2-byte registers outside the context of an interrupt handler, the host should "double-check" a measurement if the measurement deviates significantly from a previous reading.
SCL
SDA SLA6 SLA5-0 R/W D7 D6-0
START
Slave Address + R/W
ACK
Data Byte
NACK
STOP
Figure 5. I2C Bit Timing Diagram
Figure 6. Host Interface Single Write
Figure 7. Host Interface Single Read
Figure 8. Host Interface Burst Write
Figure 9. Host Interface Burst Read
Figure 10. SI1141/42/43 REG ADDRESS Format
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Notes:

Gray boxes are driven by the host to the SI1141/42/43 White boxes are driven by the SI1141/42/43 to the host A = ACK or "acknowledge" N = NACK or "no acknowledge" S = START condition Sr = repeat START condition P = STOP condition AI = Disable Auto Increment when set
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3. Operational Modes
The SI1141/42/43 can be in one of many operational modes at any one time. It is important to consider the operational mode since the mode has an impact on the overall power consumption of the SI1141/42/43. The various modes are:

Off Mode Initialization Mode Standby Mode Forced Conversion Mode Autonomous Mode
3.1. Off Mode
The SI1141/42/43 is in the Off Mode when VDD is either not connected to a power supply or if the VDD voltage is below the stated VDD_OFF voltage described in the electrical specifications. As long as the parameters stated in Table 2, "Absolute Maximum Ratings," on page 4 are not violated, no current will flow through the SI1141/42/43. In the Off Mode, the SI1141/42/43 SCL and SDA pins do not interfere with other I2C devices on the bus. The LED pins will not draw current through the infrared diodes. Keeping VDD less than VDD_OFF is not intended as a method of achieving lowest system current draw. The reason is that the ESD protection devices on the SCL, SDA and INT pins also from a current path through VDD. If VDD is grounded for example, then, current flow from system power to system ground through the SCL, SDA and INT pull-up resistors and the ESD protection devices. Allowing VDD to be less than VDD_OFF is intended to serve as a hardware method of resetting the SI1141/42/43 without a dedicated reset pin. The SI1141/42/43 can also reenter the Off Mode upon receipt of either a general I2C reset or if a software reset sequence is initiated. When one of these software methods is used to enter the Off Mode, the SI1141/42/43 typically proceeds directly from the Off Mode to the Initialization Mode.
3.2. Initialization Mode
When power is applied to VDD and is greater than the minimum VDD Supply Voltage stated in Table 1, "Recommended Operating Conditions," on page 4, the SI1141/42/43 enters its Initialization Mode. In the Initialization Mode, the SI1141/42/43 performs its initial startup sequence. Since the I2C may not yet be active, it is recommended that no I2C activity occur during this brief Initialization Mode period. The "Start-up time" specification in Table 1 is the minimum recommended time the host needs to wait before sending any I2C accesses following a power-up sequence. After Initialization Mode has completed, the SI1141/42/43 enters Standby Mode. The host must write 0x17 to the HW_KEY register for proper operation.
3.3. Standby Mode
The SI1141/42/43 spends most of its time in Standby Mode. After the SI1141/42/43 completes the Initialization Mode sequence, it enters Standby mode. While in Standby Mode, the SI1141/42/43 does not perform any Ambient Light measurements or Proximity Detection functions. However, the I2C interface is active and ready to accept reads and writes to the SI1141/42/43 registers. The internal Digital Sequence Controller is in its sleep state and does not draw much power. In addition, the INT output retains its state until it is cleared by the host. I2C accesses do not necessarily cause the SI1141/42/43 to exit the Standby Mode. For example, reading SI1141/ 42/43 registers is accomplished without needing the Digital Sequence Controller to wake from its sleep state.
3.4. Forced Conversion Mode
The SI1141/42/43 can operate in Forced Conversion Mode under the specific command of the host processor. The Forced Conversion Mode is entered if either the ALS_FORCE or the PS_FORCE command is sent. Upon completion of the conversion, the SI1141/42/43 can generate an interrupt to the host if the corresponding interrupt is enabled. It is possible to initiate both an ALS and multiple PS measurements with one command register write access by using the PSALS_FORCE command.
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3.5. Autonomous Operation Mode
The SI1141/42/43 can be placed in the Autonomous Operation Mode where measurements are performed automatically without requiring an explicit host command for every measurement. The PS_AUTO, ALS_AUTO and PSALS_AUTO commands are used to place the SI1141/42/43 in the Autonomous Operation Mode. The SI1141/42/43 updates the I2C registers for PS and ALS automatically. Each measurement is allocated a 16-bit register in the I2C map. It is possible to operate the SI1141/42/43 without interrupts. When doing so, the host poll rate must be at least twice the frequency of the conversion rates for the host to always receive a new measurement. The host can also choose to be notified when these new measurements are available by enabling interrupts. The conversion frequencies for the PS and ALS measurements are set up by the host prior to the PS_AUTO, ALS_AUTO, or PSALS_AUTO commands. The host can set a PS conversion frequency different from the ALS conversion frequency. However, they both need to be a multiple of the base conversion frequency in the MEAS_RATE register in the I2C map. The SI1141/42/43 can interrupt the host when the PS or ALS measurements reach a pre-set threshold. To assist in the handling of interrupts the registers are arranged so that the interrupt handler can perform an I2C burst read operation to read the necessary registers, beginning with the interrupt status register, and cycle through the ALS data registers followed by the individual Proximity readings.
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SI1141/42/43
4. Programming Guide
4.1. Command and Response Structure
All SI1141/42/43 I2C registers (except writes to the COMMAND register) are read or written without waking up the internal sequencer. A complete list of the I2C registers can be found in "4.5. I2C Registers" on page 25. In addition to the I2C Registers, RAM parameters are memory locations maintained by the internal sequencer. These RAM Parameters are accessible through a Command Protocol (see "4.6. Parameter RAM" on page 45). A complete list of the RAM Parameters can be found in "4.6. Parameter RAM" on page 45. The SI1141/42/43 can operate either in Forced Measurement or Autonomous Mode. When in Forced Measurement mode, the SI1141/42/43 does not make any measurements unless the host specifically requests the SI1141/42/43 to do so via specific commands (refer to the Section 3.2). The CHLIST parameter needs to be written so that the SI1141/42/43 would know which measurements to make. The parameter MEAS_RATE, when zero, places the internal sequencer in Forced Measurement mode. When in Forced Measurement mode, the internal sequencer wakes up only when the host writes to the COMMAND register. The power consumption is lowest in Forced Measurement mode (MEAS_RATE = 0). The SI1141/42/43 operates in Autonomous Operation mode when MEAS_RATE is non-zero. The MEAS_RATE represents the time interval at which the SI1141/42/43 wakes up periodically. Once the internal sequencer has awoken, the sequencer manages an internal PS Counter and ALS Counter based on the PS_RATE and ALS_RATE registers. When the internal PS counter has expired, up to three proximity measurements are made (PS1, PS2 and PS3) depending on which measurements are enabled via the upper bits of the CHLIST Parameter. All three PS measurements are performed, in sequence, beginning with the PS1 measurement channel. In the same way, when the ALS counter has expired, up to three measurements are made (ALS_VIS, ALS_IR and AUX) depending on which measurements are enabled via the upper bits of the CHLIST Parameter. All three measurements are made in the following sequence: ALS_VIS, ALS_IR and AUX. PS_RATE and ALS_RATE are normally non-zero. A value of zero in PS_RATE or ALS_RATE causes the internal sequencer to never perform that measurement group. Typically, PS_RATE or ALS_RATE represents a value of one. A value of one essentially states that the specific measurement group is made every time the device wakes up. It is possible for both the PS Counter and ALS Counter to both expire at the same time. When that occurs, the PS measurements are performed before the ALS measurements. When all measurements have been made, the internal sequencer goes back to sleep until next time, as dictated by the MEAS_RATE parameter. The operation of the SI1141/42/43 can be described as two measurement groups bound by some common factors. The PS Measurement group consists of the three PS measurements while the ALS Measurement group consists of the Visible Light Ambient Measurement (ALS_VIS), the Infrared Light Ambient Measurement (ALS_IR) and the Auxiliary measurement (AUX). Each measurement group has three measurements each. The Channel List (CHLIST) parameter enables the specific measurements for that measurement grouping. Each measurement (PS1, PS2, PS3, ALS_VIS, ALS_IR, AUX) are controlled through a combination of I2C Register or Parameter RAM. Tables 5 to 7 below can be used summarize the properties and resources used for each measurement.
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4.2. Command Protocol
The I2C map implements a bidirectional message box between the host and the SI1141/42/43 Sequencer. Hostwritable I2C registers facilitate host-to-SI1141/42/43 communication, while read-only I2C registers are used for SI1141/42/43-to-host communication. Unlike the other host-writable I2C registers, the COMMAND register causes the internal sequencer to wake up from Standby mode to process the host request. When a command is executed, the RESPONSE register is updated. Typically, when there is no error, the upper four bits are zeroes. To allow command tracking, the lower four bits implement a 4-bit circular counter. In general, if the upper nibble of the RESPONSE register is non-zero, this indicates an error or the need for special processing. The PARAM_WR and PARAM_RD registers are additional mailbox registers. In addition to the registers in the I2C map, there are environmental parameters accessible through the Command/ Response interface. These parameters are stored in the internal ram space. These parameters generally take more I2C accesses to read and write. The Parameter RAM is described in "4.6. Parameter RAM" on page 45.
Table 5. Command Register Summary
COMMAND Register Name Encoding PARAM_W R Register PARAM_RD Register Error Code in RESPONSE Register Description Reads the parameter pointed to by bitfield [4:0] and writes value to PARAM_RD. See Table 10 for parameters. Sets parameter pointed by bitfield [4:0] with value in PARAM_WR, and writes value out to PARAM_RD. See Table 10 for parameters. Performs a bit-wise AND between PARAM_WR and Parameter pointed by bitfield [4:0], writes updated value to PARAM_RD. See Table 10 for parameters. Performs a bit-wise OR of PARAM_WR and parameter pointed by bitfield [4:0], writes updated value to PARAM_RD. See Table 10 for parameters. Forces a zero into the RESPONSE register Performs a software reset of the firmware Modifies I2C address -- -- Forces a single PS measurement Forces a single ALS measurement Forces a single PS and ALS measurement
PARAM_QUERY
100 aaaaa
--
nnnn nnnn
PARAM_SET
101 aaaaa
dddd dddd
nnnn nnnn
PARAM_AND
110 aaaaa
dddd dddd
nnnn nnnn
PARAM_OR
111 aaaaa
dddd dddd
nnnn nnnn
NOP RESET BUSADDR Reserved Reserved PS_FORCE ALS_FORCE PSALS_FORCE
000 00000 000 00001 000 00010 000 00011 000 00100 000 00101 000 00110 000 00111
-- -- -- -- -- -- -- --
-- -- -- -- -- -- -- --
-- -- --
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SI1141/42/43
Table 5. Command Register Summary (Continued)
COMMAND Register Name Reserved PS_PAUSE ALS_PAUSE PSALS_PAUSE Reserved PS_AUTO ALS_AUTO PSALS_AUTO Reserved Encoding 000 01000 000 01001 000 01010 000 01011 000 01100 000 01101 000 01110 000 01111 000 1xxxx PARAM_W R Register -- -- -- -- -- -- -- -- -- PARAM_RD Register -- -- -- -- -- -- -- -- -- Error Code in RESPONSE Register -- -- Description -- Pauses autonomous PS Pauses autonomous ALS Pauses PS and ALS -- Starts/Restarts an autonomous PS Loop Starts/Restarts an autonomous ALS Loop Starts/Restarts autonomous ALS and PS loop --
Table 6. Response Register Error Codes
RESPONSE Register 0000 cccc Description NO_ERROR. The lower bit is a circular counter and is incremented every time a command has completed. This allows the host to keep track of commands sent to the SI1141/42/43. The circular counter may be cleared using the NOP command. INVALID_SETTING. An invalid setting was encountered. Clear using the NOP command. PS1_ADC_OVERFLOW. Indicates proximity channel one conversion overflow. PS2_ADC_OVERFLOW. Indicates proximity channel two conversion overflow. PS3_ADC_OVERFLOW. Indicates proximity channel three conversion overflow. ALS_VIS_ADC_OVERFLOW. Indicates visible ambient light channel conversion overflow. ALS_IR_ADC_OVERFLOW. Indicates infrared ambient light channel conversion overflow. AUX_ADC_OVERFLOW. Indicates auxiliary channel conversion overflow.
1000 0000 1000 1000 1000 1001 1000 1010 1000 1100 1000 1101 1000 1110
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4.3. Resource Summary
Table 7. Resource Summary for Interrupts and Threshold Checking
Measurement Channel Interrupt Enable Interrupt Mode
Channel Enable
Interrupt Status Output
Threshold Registers
Threshold Hysteresis
History Checking
Autonomous Measurement Time Base
Proximity Sense 1 PS1_TH[7:0]
EN_PS1 in CHLIST[0] PS1_IE in IRQ_ENABLE[2] PS1_IM[1:0] in IRQ_MODE1[5:4]
PS1_INT in IRQ_STATUS[2]
Proximity Sense 2 PS2_TH[7:0] PS_HYST[7:0]
EN_PS2 in CHLIST[1] PS2_IE in IRQ_ENABLE[3] PS2_IM[1:0] in IRQ_MODE1[7:6]
PS2_INT in IRQ_STATUS[3]
PS_HISTORY[7:0]
PS_RATE[7:0]
Proximity Sense 3 PS3_TH[7:0]
EN_PS3 in CHLIST[2] PS3_EN in IRQ_ENABLE[4] PS3_IM[1:0] in IRQ_MODE2[1:0]
PS3_INT in IRQ_STATUS[4]
MEAS_RATE[7:0]
ALS Visible ALS_LOW_TH[7:0] / ALS_HI_TH[7:0]
EN_ALS_ VIS in CHLIST[4] ALS_HYST[7:0] ALS_HISTORY[7:0] ALS_RATE[7:0]
Preliminary Rev. 0.5
-- -- -- -- --
ALS_INT[1:0] in ALS_IE[1:0] in ALS_IM[2:0] in IRQ_STATUS[1:0] IRQ_ENABLE[1:0] IRQ_MODE1[2:0]
ALS IR
EN_ALS_I R in CHLIST[5]
Auxiliary Measurement
EN_AUX in CHLIST[6]
--
SI1141/42/43
19
20
Table 8. Resource Summary for LED Choice and ADC Parameters
Measurement Channel ADC Mode ADC Output ADC Input Source ADC Recovery Count ADC High Signal Mode ADC Clock Divider ADC Alignment
LED Selection
ADC Offset
SI1141/42/43
Proximity Sense 1 PS1_ADCMUX[7:0]
PS1_LED[2:0] in PSLED12_SELECT [2:0] PS1_DATA1[7:0] / PS1_DATA0[7:0]
PS1_ALIGN in PS_ENCODING[4]
Proximity Sense 2 PS2_DATA1[7:0] / PS2_DATA0[7:0] PS2_ADCMUX[7:0] PS_ADC_GAIN[3:0] PS_ADC_REC in PS_ADC_COUNTER [6:4] PS_RANGE in PS_ADC_MISC[5]
PS2_LED[2:0] in PSLED12_SELECT [6:4] PS_ADC_MODE[1:0] in PS_ADC_MISC[2:1]
PS2_ALIGN in PS_ENCODING[5]
Proximity Sense 3 PS3_DATA1[7:0] / PS3_DATA0[7:0] PS3_ADCMUX[7:0]
PS3_LED[2:0] in PSLED3_SELECT[ 2:0]
PS3_ALIGN in PS_ENCODING[6] ADC_OFFSET [7:0]
ALS Visible
ALS_VIS_DATA1 / ALS_VIS_DATA0
VIS_ADC_REC in ALS_VIS_ADC_COUNTE R [6:4]
VIS_RANGE in ALS_VIS_ADC_MISC[5]
ALS_VIS_ADC_GAIN [3:0]
ALS_VIS_ALIGN in ALS_ENCODING[4]
Preliminary Rev. 0.5
-- ALS_IR_DATA1[7:0] / ALS_IR_DATA0[7:0] IR_ADC_REC in ALS_IR_ADC_COUNTER [6:4] IR_RANGE in ALS_IR_ADC_MISC[5] AUX_DATA1[7:0] / AUX_DATA0[7:0] AUX_ADCMUX[7:0] -- --
ALS IR
--
ALS_IR_ADC_GAIN [3:0]
ALS_IR_ALIGN in ALS_ENCODING[5]
Auxiliary Measurement
--
--
SI1141/42/43
Table 9. Resource Summary for Hardware Pins
Pin Name LED Current Drive Output Drive Disable Analog Voltage Input Enable
LED1
LED1_I in PSLED12[3:0]
ANA_IN_KEY[31:0]
LED2
LED2_I in PSLED12[7:4]
HW_KEY[7:0]
ANA_IN_KEY[31:0]
LED3
LED3_I in PSLED3[3:0]
HW_KEY[7:0]
INT
INT_OE in INT_CFG[0]
ANA_IN_KEY[31:0]
The interrupts of the SI1141/42/43 are controlled through the INT_CFG, IRQ_ENABLE, IRQ_MODE1, IRQ_MODE2 and IRQ_STATUS registers. The INT hardware pin is enabled through the INT_OE bit in the INT_CFG register. The hardware essentially performs an AND function between the IRQ_ENABLE register and IRQ_STATUS register. After this AND function, if any bits are set, the INT pin is asserted. The INT_MODE bit in the INT_CFG register is conceptually a method of determining how the INT pin is deasserted. When INT_MODE = 0, the host is responsible for clearing the interrupt by writing to the INT_STATUS register. When the specific bits of the INT_STATUS register is written with '1', that specific INT_STATUS bit is cleared. Typically, the host software is expected to read the INT_STATUS register, stores a local copy, and then writes the same value back to the INT_STATUS to clear the interrupt source. Unless specifically stated, INT_MODE should be zero for normal interrupt handling operation. In summary, the INT_CFG register is normally written with '1'. The IRQ_MODE1, IRQ_MODE2 and IRQ_ENABLE registers work together to define how the internal sequencer sets bits in the IRQ_STATUS register (and as a consequence, asserting the INT pin). The PS1 interrupts are described in Table 8. The PS2 interrupts are described in Table 9. The PS2 interrupts are described in Table 10. The ALS interrupts are described in Table 11, and the Command Interface interrupts are described in Table 12.
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SI1141/42/43
Table 10. PS1 Channel Interrupt Resources
IRQ_ENABLE[2] IRQ_MODE1[5:4] Description PS1_IE 0 1 1 1 PS1_IM[1:0] 0 0 0 1 0 0 1 1 No PS1 Interrupts IRQ_STATUS[2] set after every PS1 sample IRQ_STATUS[2] set whenever PS1 threshold (PS1_TH) is crossed IRQ_STATUS[2] set whenever PS1 sample is above PS1 threshold (PS1_TH)
Note: There is hysteresis applied (PS_HYST) and history checking (PS_HISTORY). PS1_TH, PS_HYST and are encoded in 8-bit compressed format.
Table 11. PS2 Channel Interrupt Resources
IRQ_ENABLE[3] IRQ_MODE1[7:6] Description PS2_IE 0 1 1 1 PS2_IM[1:0] 0 0 0 1 0 0 1 1 No PS2 Interrupts IRQ_STATUS[3] set after every PS2 sample IRQ_STATUS[3] set whenever PS2 threshold (PS2_TH) is crossed IRQ_STATUS[3] set when PS2 sample is above PS2 threshold (PS2_TH)
Note: There is hysteresis applied (PS_HYST) and history checking (PS_HISTORY). PS2_TH and PS_HYST are encoded in 8-bit compressed format.
Table 12. PS3 Channel Interrupt Resources
IRQ_ENABLE[4] IRQ_MODE2[1:0] Description PS3_IE 0 1 1 1 PS3_IM[1:0] 0 0 0 1 0 0 1 1 No PS3 Interrupts IRQ_STATUS[4] set after every PS3 sample IRQ_STATUS[4] set whenever PS3 threshold (PS3_TH) is crossed IRQ_STATUS[4] set whenever PS3 sample is above PS3 threshold (PS3_TH)
Note: There is hysteresis applied (PS_HYST) and history checking (PS_HISTORY). PS3_TH and PS_HYST are encoded in 8-bit compressed format.
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Table 13. Ambient Light Sensing Interrupt Resources
IRQ_ENABLE[1:0] ALS_IE[1:0] 0 0 0 1 0 0 IRQ_MODE1[2:0] Description ALS_IM[2:0] 0 0 0 0 No ALS Interrupts IRQ_STATUS[0] set after every ALS_VIS sample1 Monitors ALS_VIS, IRQ_STATUS[0] upon exiting region between low and high thresholds (ALS_LOW_TH and ALS_HI_TH) Monitors ALS_VIS, IRQ_STATUS[1] set upon entering region between low and high thresholds (ALS_LOW_TH and ALS_HI_TH) Monitors ALS_IR, IRQ_STATUS[0] set upon exiting region between low and high thresholds (ALS_LOW_TH and ALS_HI_TH) Monitors ALS_IR, IRQ_STATUS[1] set upon entering region between low and high thresholds (ALS_LOW_TH and ALS_HI_TH)
x
1
x
0
1
1
x
1
0
x
x
1
x
1
1
1
x
1
1
x
Notes: 1. For ALS_IR channel, interrupts per sample is not possible without also enabling ALS_VIS 2. All other combinations are invalid and may result in unintended operation 3. There is hysteresis applied (ALS_TH) and history checking (ALS_HISTORY). ALS_LOW_TH, ALS_HI_TH, ALS_HYST are encoded in 8-bit compressed format.
Table 14. Command Interrupt Resources
IRQ_ENABLE[5] CMD_IE 0 1 1 x x x IRQ_MODE1[3:2] Description CMD_IM[1:0] 0 0 1 No CMD Interrupts IRQ_STATUS[5] set when there is a new RESPONSE IRQ_STATUS[5] set when there is a new error code in RESPONSE
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SI1141/42/43
4.4. Signal Path Software Model
The following diagram gives an overview of the signal paths, along with the I2C register and RAM Parameter bit fields that control them. Sections with detailed descriptions of the I2C registers and Parameter RAM follow.
PS1_ALIGN PS_RATE PS_ADC_REC PS_ADC_GAIN PS_RANGE ADC_OFFSET
PS1_ADCMUX Select
Offset Sum
16 PS1_DATA
Ref.
Vdd GND
0 2 3 6 Out 0x25 0x65 0x75
Analog
Range Gain Recov. time Rate Align
Digital
In
Enable EN_PS1
PS2_ADCMUX
PS2_ALIGN PS_RATE PS_ADC_REC PS_ADC_GAIN PS_RANGE ADC_OFFSET
Select
Offset Sum
16 PS2_DATA
Ref.
Vdd GND
0 2 3 6 Out 0x25 0x65 0x75
Analog
Range Gain Recov. time Rate Align
Digital
In
Enable EN_PS2
PS3_ADCMUX
PS3_ALIGN PS_RATE PS_ADC_REC PS_ADC_GAIN PS_RANGE ADC_OFFSET
Select
Offset Sum
16 PS3_DATA
Ref.
Large IR
Vdd GND
0 2 3 6 Out 0x25 0x65 0x75
Analog
Range Gain Recov. time Rate Align
Digital
In
Enable EN_PS3
GND
ALS_VIS_ALIGN ALS_RATE ALS_VIS_ADC_REC ALS_VIS_ADC_GAIN VIS_RANGE ADC_OFFSET
Offset Sum
16 ALS_VIS_DATA
Analog
Range Gain Recov. time Rate Align
Digital
In
Enable EN_ALS_VIS
Small visible ALS_IR_ALIGN ALS_RATE ALS_IR_ADC_REC ALS_IR_ADC_GAIN IR_RANGE
GND ALS_IR_ADCMUX
ADC_OFFSET
Offset Sum
16 ALS_IR_DATA
0 Out 3 Analog
Range Gain Recov. time Rate Align
Select
Digital
In
Enable EN_ALS_IR
Small IR
AUX_ADCMUX GND Select ADC_OFFSET
Offset Sum
16 AUX_DATA
0x65
Temperature sensor
Out
Vdd
Analog
Digital
16
In
Enable EN_AUX
0x75
Figure 11. Signal Path Programming Model
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4.5. I2C Registers
Table 15. I2C Register Summary
I2C Register Name PART_ID REV_ID SEQ_ID INT_CFG IRQ_ENABLE IRQ_MODE1 IRQ_MODE2 HW_KEY MEAS_RATE ALS_RATE PS_RATE ALS_LOW_TH Reserved ALS_HI_TH ALS_IR_ADCMUX PS_LED21 PS_LED3 PS1_TH Reserved PS2_TH Reserved PS3_TH Reserved PARAM_WR COMMAND RESPONSE IRQ_STATUS ALS_VIS_DATA0 ALS_VIS_DATA1 ALS_IR_DATA0 Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x20 0x21 0x22 0x23 0x24 CMD_INT PS1_TH Reserved PS2_TH Reserved PS3_TH Reserved PARAM_WR COMMAND RESPONSE PS3_INT PS2_INT PS1_INT ALS_INT LED2_I HW_KEY MEAS_RATE ALS_RATE PS_RATE ALS_LOW_TH Reserved ALS_HI_TH ALS_IR_ADCMUX LED1_I LED3_I PS2_IM CMD_IE PS3_IE PS2_IE PS1_IE 7 6 5 4 PART_ID REV_ID SEQ_ID INT_MODE ALS_IE ALS_IM CMD_IM PS3_IM INT_OE 3 2 1 0
PS1_IM
ALS_VIS_DATA0 ALS_VIS_DATA1 ALS_IR_DATA0
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Table 15. I2C Register Summary (Continued)
I2C Register Name ALS_IR_DATA1 PS1_DATA0 PS1_DATA1 PS2_DATA0 PS2_DATA1 PS3_DATA0 PS3_DATA1 AUX_DATA0 AUX_DATA1 PARAM_RD CHIP_STAT ANA_IN_KEY Address 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x30 0x3B- 0x3E ANA_IN_KEY 7 6 5 4 ALS_IR_DATA1 PS1_DATA0 PS1_DATA1 PS2_DATA0 PS2_DATA1 PS3_DATA0 PS3_DATA1 AUX_DATA0 AUX_DATA1 PARAM_RD RUNNING SUSPEND SLEEP 3 2 1 0
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PART_ID @ 0x00
Bit Name Type
7
6
5
4 PART_ID R
3
2
1
0
Reset value = 0100 0001 (SI1141) Reset value = 0100 0010 (Si1142) Reset value = 0100 0011 (Si1143) REV_ID @ 0x1 Bit Name Type Reset value = 0000 0001 SEQ_ID @ 0x02 7 6 5 4 REV_ID R 3 2 1 0
Bit Name Type
7
6
5
4 SEQ_ID R
3
2
1
0
Reset value = 0000 1000 Bit Name Sequencer Revision. 7:0 SEQ_ID 0x01 0x02 0x03 0x08 Si114x-A01 (MAJOR_SEQ=0, MINOR_SEQ=1) Si114x-A02 (MAJOR_SEQ=0, MINOR_SEQ=2) Si114x-A03 (MAJOR_SEQ=0, MINOR_SEQ=3) Si114x-A10 (MAJOR_SEQ=1, MINOR_SEQ=0) Function
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INT_CFG @ 0x03
Bit Name Type
7
6
5
4
3
2
1 INT_MODE RW
0 INT_OE RW
Reset value = 0000 0000 Bit 7:2 Name Reserved Reserved. Interrupt Mode. The INT_MODE describes how the bits in the IRQ_STATUS Registers are cleared. 0: The IRQ_STATUS Register bits are set by the internal sequencer and are sticky. It is the host's responsibility to clear the interrupt status bits in the IRQ_STATUS register to clear the interrupt. 1: If the Parameter Field PSx_IM = 11, the internal sequencer clears the INT pin automatically. INT Output Enable. 0 INT_OE INT_OE controls the INT pin drive 0: INT pin is never driven 1: INT pin driven low whenever an IRQ_STATUS and its corresponding IRQ_ENABLE bits match Function
1
INT_MODE
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IRQ_ENABLE @ 0x04
Bit Name Type
7
6
5 CMD_IE RW
4 PS3_IE RW
3 PS2_IE RW
2 PS1_IE RW
1 ALS_IE RW
0
Reset value = 0000 0000 Bit 7:6 Name Reserved Reserved. Command Interrupt Enable. 5 CMD_IE Enables interrupts based on COMMAND/RESPONSE activity. 0: INT never asserts due to COMMAND/RESPONSE interface activity. 1: Assert INT pin whenever CMD_INT is set by the internal sequencer. PS3 Interrupt Enable. 4 PS3_IE Enables interrupts based on PS3 Channel Activity. 0: INT never asserts due to PS3 Channel activity. 1: Assert INT pin whenever PS3_INT is set by the internal sequencer. PS2 Interrupt Enable. 3 PS2_IE Enables interrupts based on PS2 Channel Activity. 0: INT never asserts due to PS2 Channel activity. 1: Assert INT pin whenever PS2_INT is set by the internal sequencer. PS1 Interrupt Enable. 2 PS1_IE Enables interrupts based on PS1 Channel Activity. 0: INT never asserts due to PS1 Channel activity. 1: Assert INT pin whenever PS1_INT is set by the internal sequencer. ALS Interrupt Enable. 1:0 ALS_IE Enables interrupts based on ALS Activity. 00: INT never asserts due to ALS activity. x1: Assert INT pin whenever ALS_INT[1] bit is set by the internal sequencer. 1x: Assert INT pin whenever ALS_INT[0] is set by the internal sequencer. Function
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SI1141/42/43
IRQ_MODE1 @ 0x05
Bit Name Type
7 PS2_IM RW
6
5 PS1_IM RW
4
3
2
1 ALS_IM RW
0
Reset value = 0000 0000 Bit Name Function PS2 Interrupt Mode applies only when PS2_IE is also set. 00: PS2_INT is set whenever a PS2 measurement has completed. 01: PS2_INT is set whenever the current PS2 measurement crosses the PS2_TH threshold. 11: PS2_INT is set whenever the current PS2 measurement is greater than the PS2_TH threshold. PS1 Interrupt Mode applies only when PS1_IE is also set. 00: PS1_INT is set whenever a PS1 measurement has completed. 01: PS1_INT is set whenever the current PS1 measurement crosses the PS1_TH threshold. 11: PS1_INT is set whenever the current PS1 measurement is greater than the PS1_TH threshold. Reserved. ALS Interrupt Mode function is defined in conjunction with ALS_IE[1:0]. ALS_IE[1:0] / ALS_IM[2:0]: 00 / 000: Neither IRQ_STATUS[1] nor IRQ_STATUS[0] are ever set. 01 / 000: IRQ_STATUS[0] sets after every ALS_VIS sample. x1 / x01: Monitors ALS_VIS channel, IRQ_STATUS[0] asserts if measurement exits window between ALS_LOW_TH and ALS_HIGH_TH. x1 / x11: Monitors ALS_IR channel, IRQ_STATUS[0] asserts if measurement exits window between ALS_LOW_TH and ALS_HIGH_TH. 1x / x01: Monitors ALS_VIS channel, IRQ_STATUS[1] asserts if measurement enters window between ALS_LOW_TH and ALS_HIGH_TH. 1x / x11: Monitors ALS_IR channel, IRQ_STATUS[1] asserts if measurement enters window between ALS_LOW_TH and ALS_HIGH_TH.
7:6
PS2_IM
5:4
PS1_IM
3
Reserved
2:0
ALS_IM
Note: The ALS_IM description apples only to sequencer revisions A03 or later.
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IRQ_MODE2 @ 0x06
Bit Name Type
7
6
5
4
3 CMD_IM RW
2
1 PS3_IM RW
0
Reset value = 0000 0000 Bit 7:4 Name Reserved Reserved. Command Interrupt Mode applies only when CMD_IE is also set. 00: CMD_INT is set whenever the RESPONSE register is written. CMD_IM 01: CMD_INT is set whenever the RESPONSE register is written with an error code (MSB set). 1x: Reserved. PS3 Interrupt Mode applies only when PS3_IE is also set. 00: PS3_INT is set whenever a PS3 measurement has completed. 01: PS3_INT is set whenever the current PS3 measurement crosses the PS3_TH threshold. 11: PS1_INT is set whenever the current PS1 measurement is greater than the PS3_TH threshold. Function
3:2
1:0
PS3_IM
HW_KEY @ 0x07
Bit Name Type
7
6
5
4 HW_KEY RW
3
2
1
0
Reset value = 0000 0000 Bit 7:0 Name HW_KEY Function The system must write the value 0x17 to this register for proper Si114x operation.
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MEAS_RATE @ 0x08
Bit Name Type
7
6
5
4
3
2
1
0
MEAS_RATE RW
Reset value = 0000 0000 Bit Name Function
7:0
MEAS_RATE is an 8-bit compressed value representing a 16-bit integer. The uncompressed 16-bit value, when multiplied by 31.25 us, represents the time duration between wake-up periods where measurements are made. Example Values: 0x00: The device does not make any autonomous measurements MEAS_RATE 0x84: The device wakes up every 10 ms (0x140 x 31.25 s) 0x94: The device wakes up every 20 ms (0x280 x 31.25 s) 0xB9: The device wakes up every 100 ms (0x0C80 x 31.25 s) 0xDF: The device wakes up every 496 ms (0x3E00 x 31.25 s) 0xFF: The device wakes up every 1.984 seconds (0xF800 x 31.25 s)
ALS_RATE @ 0x09
Bit Name Type
7
6
5
4
3
2
1
0
ALS_RATE RW
Reset value = 0000 0000 Bit Name Function ALS_RATE is an 8-bit compressed value representing a 16-bit multiplier. This multiplier, in conjunction with the MEAS_RATE time, represents how often ALS Measurements are made. Example Values: 0x00: Autonomous ALS Measurements are not made. 0x08: ALS Measurements made every time the device wakes up. (0x0001 x timeValueOf(MEAS_RATE)) 0x32: ALS Measurements made every 10 times the device wakes up. (0x000A x timeValueOf(MEAS_RATE) 0x69: ALS Measurements made every 100 times the device wakes up. (0x0064 x timeValueOf(MEAS_RATE)
7:0
ALS_RATE
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PS_RATE @ 0x0A Bit Name Type Reset value = 0000 0000 Bit Name Function PS_RATE is an 8-bit compressed value representing a 16-bit multiplier. This multiplier, in conjunction with the MEAS_RATE time, represents how often PS Measurements are made. Example Values: 0x00: Autonomous PS Measurements are not made 0x08: PS Measurements made every time the device wakes up (0x0001 x timeValueOf(MEAS_RATE)) 0x32: PS Measurements made every 10 times the device wakes up (0x000A x timeValueOf(MEAS_RATE) 0x69: PS Measurements made every 100 times the device wakes up (0x0064 x timeValueOf(MEAS_RATE) 7 6 5 4 PS_RATE RW 3 2 1 0
7:0
PS_RATE
ALS_LOW_TH @ 0x0B Bit Name Type Reset value = 0000 0000 Bit Name Function ALS_LOW_TH is an 8-bit compressed value representing a 16-bit threshold value. The uncompressed value represented by ALS_LOW_TH (when used in conjunction with uncompressed value represented by ALS_HI_TH) forms a window region applied to ALS_VIS or ALS_IR measurements for interrupting the host. 7 6 5 4 3 2 1 0
ALS_LOW_TH RW
7:0
ALS_LOW_TH
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ALS_HI_TH @ 0x0D Bit Name Type Reset value = 0000 0000 Bit Name Function ALS_HI_TH is an 8-bit compressed value representing a 16-bit threshold value. The uncompressed value represented by ALS_HI_TH (when used in conjunction with uncompressed value represented by ALS_LOW_TH) forms a window region applied to ALS_VIS or ALS_IR measurements for interrupting the host. 7 6 5 4 3 2 1 0
ALS_HI_TH RW
7:0
ALS_HI_TH
Note: This register available for sequencer revisions A03 or later.
ALS_IR_ADCMUX @ 0x0E Bit Name Type Reset value = 0000 0000 Bit 7:0 Name ALS_IR_ADCMUX 0x00: Small IR photodiode 0x03: Large IR photodiode Function Selects ADC Input for ALS_IR Measurement. 7 6 5 4 3 2 1 0
ALS_IR_ADCMUX RW
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PS_LED21 @ 0x0F Bit Name Type Reset value = 0000 0000 Bit 7:4 Name LED2_I Function LED2_I Represents the irLED current sunk by the LED2 pin during a PS measurement. On the SI1141, these bits must be set to zero. LED1_I Represents the irLED current sunk by the LED1 pin during a PS measurement. LED3_I, LED2_I, and LED1_I current encoded as follows: 0000: No current 0001: Minimum current 1111: Maximum current Refer to Table 3, "Performance Characteristics1," on page 5 for LED current values. 7 6 LED2_I RW 5 4 3 2 LED1_I RW 1 0
3:0
LED1_1
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PS_LED3 @ 0x10 Bit Name Type Reset value = 0000 0000 Bit 7:4 3:0 Name Reserved LED3_I Reserved. LED3_I Represents the irLED current sunk by the LED3 pin during a PS measurement. See PS_LED21 Register for additional details. On the SI1141 and Si1142, these bits must be set to zero. Function 7 6 5 4 3 2 LED3_I RW 1 0
PS1_TH @ 0x11 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS1_TH Function PS1_TH is an 8-bit compressed value representing a 16-bit threshold value. The uncompressed value represented by PS1_TH is compared to PS1 measurements during autonomous operation for interrupting the host. 7 6 5 4 PS1_TH RW 3 2 1 0
PS2_TH @ 0x13 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS2_TH Function PS2_TH is an 8-bit compressed value representing a 16-bit threshold value. The uncompressed value represented by PS2_TH is compared to PS2 measurements during autonomous operation for interrupting the host. 7 6 5 4 PS2_TH RW 3 2 1 0
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PS3_TH @ 0x15 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS3_TH Function PS3_TH is an 8-bit compressed value representing a 16-bit threshold value. The uncompressed value represented by PS3_TH is compared to PS3 measurements during autonomous operation for interrupting the host. 7 6 5 4 PS3_TH RW 3 2 1 0
PARAM_WR @ 0x17 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name Function 7 6 5 4 3 2 1 0
PARAM_WR RW
PARAM_WR Mailbox register for passing parameters from the host to the sequencer.
COMMAND @ 0x18 Bit Name Type Reset value = 0000 0000 Bit Name COMMAND Register. 7:0 COMMAND The COMMAND Register is the primary mailbox register into the internal sequencer. Writing to the COMMAND register is the only I2C operation that wakes the device from standby mode. Function 7 6 5 4 COMMAND RW 3 2 1 0
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RESPONSE @ 0x20 Bit Name Type Reset value = 0000 0000 Bit Name Function The Response register is used in conjunction with command processing. When an error is encountered, the response register will be loaded with an error code. All error codes will have the MSB is set. The error code is retained until a RESET or NOP command is received by the sequencer. Other commands other than RESET or NOP will be ignored. However, any autonomous operation in progress continues normal operation despite any error. 0x00-0x0F: No Error. Note that bits 3:0 form an incrementing roll-over counter. 0x80: Invalid Command Encountered during command processing 0x88: ADC Overflow encountered during PS1 measurement 0x89: ADC Overflow encountered during PS2 measurement 0x8A: ADC Overflow encountered during PS3 measurement 0x8C: ADC Overflow encountered during ALS-VIS measurement 0x8D: ADC Overflow encountered during ALS-IR measurement 0x8E: ADC Overflow encountered during AUX measurement 7 6 5 4 3 2 1 0
RESPONSE RW
7:0
RESPONSE
38
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IRQ_STATUS @ 0x21 Bit Name Type Reset value = 0000 0000 Bit 7:6 5 4 3 2 1:0 Name Reserved CMD_INT PS3_INT PS2_INT PS1_INT ALS_INT Reserved. Command Interrupt Status. PS3 Interrupt Status. PS3 Interrupt Status. PS1 Interrupt Status. ALS Interrupt Status. Function 7 6 5 CMD_INT RW 4 PS3_INT RW 3 PS2_INT RW 2 PS1_INT RW 1 ALS_INT RW 0
Notes: 1. If the corresponding IRQ_ENABLE bit is also set when the IRQ_STATUS bit is set, the INT pin is asserted. 2. When INT_MODE = 0, the host must write '1' to the corresponding XXX_INT bit to clear the interrupt. 3. When INT_MODE = 1, the internal sequencer clears all the XXX_INT bits (and INT pin) automatically unless used with PS (Parameter Field PSx_IM = 11). Use of INT_MODE = 0 is recommended.
ALS_VIS_DATA0 @ 0x22 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name ALS_VIS_DATA0 ALS VIS Data LSB. Function 7 6 5 4 3 2 1 0
ALS_VIS_DATA0 RW
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ALS_VIS_DATA1 @ 0x23 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name ALS_VIS_DATA1 ALS VIS Data MSB. Function 7 6 5 4 3 2 1 0
ALS_VIS_DATA1 RW
ALS_IR_DATA0 @ 0x24 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name ALS_IR_DATA0 ALS IR Data LSB. Function 7 6 5 4 3 2 1 0
ALS_IR_DATA0 RW
ALS_IR_DATA1 @ 0x25 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name ALS_IR_DATA1 ALS IR Data MSB. Function 7 6 5 4 3 2 1 0
ALS_IR_DATA1 RW
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PS1_DATA0 @ 0x26 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS1_DATA0 PS1 Data LSB. Function 7 6 5 4 3 2 1 0
PS1_DATA0 RW
PS1_DATA1 @ 0x27 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS1_DATA1 PS1 Data MSB. Function 7 6 5 4 3 2 1 0
PS1_DATA1 RW
PS2_DATA0 @ 0x28 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS2_DATA0 PS2 Data LSB. Function 7 6 5 4 PS2_DATA0 RW 3 2 1 0
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PS2_DATA1 @ 0x29 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS2_DATA1 PS2 Data MSB. Function 7 6 5 4 3 2 1 0
PS2_DATA1 RW
PS3_DATA0 @ 0x2A Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS3_DATA0 PS3 Data LSB. Function 7 6 5 4 3 2 1 0
PS3_DATA0 RW
PS3_DATA1 @ 0x2B Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PS3_DATA1 PS3 Data MSB. Function 7 6 5 4 3 2 1 0
PS3_DATA1 RW
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AUX_DATA0 @ 0x2C Bit Name Type Reset value = 0000 0000 Bit 7:0 Name AUX_DATA0 AUX Data LSB. Function 7 6 5 4 3 2 1 0
AUX_DATA0 RW
AUX_DATA1 @ 0x2D Bit Name Type Reset value = 0000 0000 Bit 7:0 Name AUX_DATA1 AUX Data MSB. Function 7 6 5 4 3 2 1 0
AUX_DATA1 RW
PARAM_RD @ 0x2E Bit Name Type Reset value = 0000 0000 Bit 7:0 Name PARAM_RD Function Mailbox register for passing parameters from the sequencer to the host. 7 6 5 4 3 2 1 0
PARAM_RD RW
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CHIP_STAT @ 0x30 Bit Name Type Reset value = 0000 0000 Bit 7:3 2 1 0 Name Reserved RUNNING SUSPEND SLEEP Reserved Device is awake. Device is in a low-power state, waiting for a measurement to complete. Device is in its lowest power state. Function 7 6 5 4 3 2 RUNNING R 1 SUSPEND R 0 SLEEP R
ANA_IN_KEY @ 0x3B to 0x3E Bit 0x3B 0x3C 0x3D 0x3E Type Reset value = 0000 0000 Bit 31:0 Name ANA_IN_KEY[31:0] Reserved. Function 7 6 5 4 3 2 1 0
ANA_IN_KEY[31:24] ANA_IN_KEY[23:16] ANA_IN_KEY[15:8] ANA_IN_KEY[7:0] RW
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4.6. Parameter RAM
Table 16. Parameter RAM Summary Table
Parameter Name I2C_ADDR CHLIST PSLED12_SELECT PSLED3_SELECT Reserved PS_ENCODING ALS_ENCODING PS1_ADCMUX PS2_ADCMUX PS3_ADCMUX PS_ADC_COUNTER PS_ADC_GAIN PS_ADC_MISC Reserved Reserved AUX_ADCMUX ALS_VIS_ADC_COUNTER ALS_VIS_ADC_GAIN ALS_VIS_ADC_MISC Reserved Reserved ALS_HYST PS_HYST PS_HISTORY ALS_HISTORY ADC_OFFSET Reserved LED_REC ALS_IR_ADC_COUNTER ALS_IR_ADC_GAIN ALS_IR_ADC_MISC Offset 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14- 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F Reserved (always set to 0) -- IR_ADC_REC -- IR_RANGE Reserved (always set to 0) -- -- -- PS_ADC_REC -- PS_RANGE -- -- PS3_ALIGN -- PS2_ALIGN ALS_IR_ALIGN -- -- EN_AUX EN_ALS_IR PS2_LED -- Reserved (always set to 0) PS1_ALIGN ALS_VIS_ ALIGN PS1 ADC Input Selection PS2 ADC Input Selection PS3 ADC Input Selection Reserved (always set to 0) PS_ADC_GAIN PS_ADC_MODE Reserved (always set to 0) Reserved (always set to 0) Bit 7 Bit 6 Bit 5 Bit 4 I 2C Address -- -- EN_PS3 EN_PS2 EN_PS1 PS1_LED PS3_LED Bit 3 Bit 2 Bit 1 Bit 0
EN_ALS_VIS
--
Reserved (do not modify from default setting of 0x00) Reserved (do not modify from default setting of 0x02) AUX ADC Input Selection VIS_ADC_REC -- VIS_RANGE Reserved (always set to 0) ALS_VIS_ADC_GAIN Reserved (always set to 0)
Reserved (do not modify from default setting of 0x40) Reserved (do not modify from default setting of 0x00) ALS Hysteresis PS Hysteresis PS History Setting ALS History Setting ADC Offset Reserved (do not modify from default setting of 0x00) LED recovery time Reserved (always set to 0) ALS_IR_ADC_GAIN Reserved (always set to 0)
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I2C @ 0x00 Bit Name Type Reset value = 0000 0000 Bit 7:0 Name I2C Address
2
7
6
5
4
2
3 RW
2
1
0
I C Address
Function Specifies a new I C Address for the device to respond to. The new address takes effect when a BUSADDR command is received.
CHLIST @ 0x01 Bit Name Type Reset value = 0000 0000 Bit 7 6 5 4 3 2 1 0 Name Reserved EN_AUX EN_ALS_IR EN_ALS_VIS Reserved EN_PS3 EN_PS2 EN_PS1 Reserved. Enables Auxiliary Channel, data stored in AUX_DATA1[7:0] and AUX_DATA0[7:0]. Enables ALS IR Channel, data stored in ALS_IR_DATA1[7:0] and ALS_IR_DATA0[7:0]. Enables ALS Visible Channel, data stored in ALS_VIS_DATA1[7:0] and ALS_VIS_DATA0[7:0]. Reserved. Enables PS Channel 3, data stored in PS3_DATA1[7:0] and PS3_DATA0[7:0]. Enables PS Channel 2, data stored in PS2_DATA1[7:0] and PS2_DATA0[7:0]. Enables PS Channel 1, data stored in PS1_DATA1[7:0] and PS1_DATA0[7:0]. Function 7 6 EN_AUX 5 RW 4 3 2 EN_PS3 1 EN_PS2 RW 0 EN_PS1
EN_ALS_IR EN_ALS_VIS
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PSLED12_SELECT @ 0x02 Bit Name Type Reset value = 0010 0001 Bit 7 Name Reserved Reserved. Specifies the LED pin driven during the PS2 Measurement. Note that any combination of irLEDs is possible. 000: NO LED DRIVE xx1: LED1 Drive Enabled x1x: LED2 Drive Enabled (Si1142 and Si1143 only. Clear for SI1141) 1xx: LED3 Drive Enabled (Si1143 only. Clear for SI1141 and Si1142) Reserved. Specifies the LED pin driven during the PS1 Measurement. Note that any combination of irLEDs is possible. 000: NO LED DRIVE xx1: LED1 Drive Enabled x1x: LED2 Drive Enabled (Si1142 and Si1143 only. Clear for SI1141) 1xx: LED3 Drive Enabled (Si1143 only. Clear for SI1141 and Si1142) Function 7 6 5 PS2_LED RW 4 3 2 1 PS1_LED RW 0
6:4
PS2_LED
3
Reserved
2:0
PS1_LED
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PSLED3_SELECT @ 0x03 Bit Name Type Reset value = 0000 0100 Bit 7:3 Name Reserved Reserved. Specifies the LED pin driven during the PS3 Measurement. Note that any combination of irLEDs is possible. 000: No LED drive. PS3_LED xx1: LED1 drive enabled. x1x: LED2 drive enabled (Si1142 and Si1143 only. Clear for SI1141). 1xx: LED3 drive enabled (Si1143 only. Clear for SI1141 and Si1142). Function 7 6 5 4 3 2 1 PS3_LED RW 0
2:0
PS_ENCODING @ 0x05 Bit Name Type Reset value = 0000 0000 Bit 7 6 5 4 3:0 Name Reserved Reserved. Function 7 6 5 4 3 2 1 0
PS3_ALIGN PS2_ALIGN PS1_ALIGN RW
PS3_ALIGN When set, the ADC reports the least significant 16 bits of the 17-bit ADC when performing PS3 Measurement. Reports the 16 MSBs when cleared. PS2_ALIGN When set, the ADC reports the least significant 16 bits of the 17-bit ADC when performing PS2 Measurement. Reports the 16 MSBs when cleared. PS1_ALIGN Reserved When set, the ADC reports the least significant 16 bits of the 17-bit ADC when performing PS1 Measurement. Reports the 16 MSBs when cleared. Reserved (always set to 0).
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ALS_ENCODING @ 0x06 Bit Name Type Reset value = 0000 0000 Bit 7:6 5 4 3:0 Name Reserved ALS_IR_ALIGN ALS_VIS_ALIGN Reserved Reserved. When set, the ADC reports the least significant 16 bits of the 17-bit ADC when performing ALS VIS Measurement. Reports the 16 MSBs when cleared. When set, the ADC reports the least significant 16 bits of the 17-bit ADC when performing ALS IR Measurement. Reports the 16 MSBs when cleared. Reserved (always set to 0). Function 7 6 5 4 3 2 1 0
ALS_IR_ALIGN ALS_VIS_ALIGN RW RW
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PS1_ADCMUX @ 0x07 Bit Name Type Reset value = 0000 0011 Bit Name Function Selects ADC Input for PS1 Measurement. The following selections are valid when PS_ADC_MODE = 1 (default). This setting is for normal Proximity Detection function. 0x03: Large IR Photodiode 0x00: Small IR Photodiode In addition, the following selections are valid for PS_ADC_MODE = 0. With this setting, irLED drives are disabled and the PS channels are no longer operating in normal Proximity Detection function. The results have no reference and the references needs to be measured in a separate measurement. 0x02: Visible Photodiode A separate 'No Photodiode' measurement should be subtracted from this reading. Note that the result is a negative value. The result should therefore be negated to arrive at the Ambient Visible Light reading. 0x03: Large IR Photodiode PS1_ADCMUX A separate "No Photodiode" measurement should be subtracted to arrive at Ambient IR reading. 0x00: Small IR Photodiode A separate "No Photodiode" measurement should be subtracted to arrive at Ambient IR reading. 0x06: No Photodiode This is typically used as reference for reading ambient IR or visible light. 0x25: GND voltage This is typically used as the reference for electrical measurements. 0x65: Temperature (Should be used only for relative temperature measurement. Absolute Temperature not guaranteed) A separate GND measurement should be subtracted from this reading. 0x75: VDD voltage A separate GND measurement is needed to make the measurement meaningful. 7 6 5 4 3 2 1 0
PS1_ADCMUX RW
7:0
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PS2_ADCMUX @ 0x08 Bit Name Type Reset value = 0000 0011 Bit 7:0 Name PS2_ADCMUX Function Selects input for PS2 measurement. See PS1_ADCMUX register description for details. 7 6 5 4 3 2 1 0
PS2_ADCMUX RW
PS3_ADCMUX @ 0x09 Bit Name Type Reset value = 0000 0011 Bit 7:0 Name PS3_ADCMUX Function Selects input for PS3 measurement. See PS1_ADCMUX register description for details. 7 6 5 4 3 2 1 0
PS3_ADCMUX RW
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PS_ADC_COUNTER @ 0x0A Bit Name Type Reset value = 0111 0000 Bit 7 Name Reserved Reserved. Function 7 6 5 PS_ADC_REC RW 4 3 2 1 0
6:4
Recovery period the ADC takes before making a PS measurement. 000: 1 ADC Clock (50 ns) 001: 7 ADC Clock (350 ns) 010: 15 ADC Clock (750 ns) PS_ADC_REC 011: 31 ADC Clock (1.55 s) 100: 63 ADC Clock (3.15 s) 101: 127 ADC Clock (6.35 s) 110: 255 ADC Clock (12.75 s) 111: 511 ADC Clock (25.55 s) Reserved Reserved (always set to 0).
3:0
PS_ADC_GAIN @ 0x0B Bit Name Type Reset value = 0000 0000 Bit 7:4 Name Reserved Reserved. Increases the irLED pulse width and ADC integration time by a factor of (2 ^ PS_ADC_GAIN) for all PS measurements. Care must be taken when using this feature. At an extreme case, each of the three PS measurements can be configured to drive three separate irLEDs, each of which, are configured for 359 mA. The internal sequencer does not protect the device from such an error. To prevent permanent damage to the device, do not enter any value greater than 5 without consulting with Silicon Labs. For Example: 0x0: ADC Clock is divided by 1 0x4: ADC Clock is divided by 16 0x5: ADC Clock is divided by 32 Function 7 6 5 4 3 2 1 0
PS_ADC_GAIN RW
3:0
PS_ADC_GAIN
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PS_ADC_MISC @ 0x0C Bit Name Type Reset value = 0000 0100 Bit 7:6 Name Reserved Reserved. When performing PS measurements, the ADC can be programmed to operate in high sensitivity operation or high signal range. The high signal range is useful in operation under direct sunlight. 0: Normal Signal Range 1: High Signal Range (Gain divided by 14.5) Reserved. Function 7 6 5 PS_RANGE RW 4 3 2 PS_ADC_MODE RW 1 0
5
PS_RANGE
4:3
Reserved
2
PS Channels can either operate normally as PS channels, or it can be used to perform raw ADC measurements: PS_ADC_MODE 0: Raw ADC Measurement Mode 1: Normal Proximity Measurement Mode Reserved Reserved.
1:0
AUX_ADCMUX @ 0x0F Bit Name Type Reset value = 0110 0101 Bit Name Function 7 6 5 4 3 2 1 0
AUX_ADCMUX RW
7:0
Selects input for AUX Measurement. These measurements are referenced to GND. 0x65: Temperature (Should be used only for relative temperature measurement. AbsoAUX_ADCMUX lute Temperature not guaranteed) 0x75: VDD voltage
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ALS_VIS_ADC_COUNTER @ 0x10 Bit Name Type Reset value = 0111 0000 Bit 7 Name Reserved Reserved. Function 7 6 5 VIS_ADC_REC RW 4 3 2 1 0
6:4
Recovery period the ADC takes before making a ALS-VIS measurement. 000: 1 ADC Clock (50 ns) 001: 7 ADC Clock (350 ns) 010: 15 ADC Clock (750 ns) VIS_ADC_REC 011: 31 ADC Clock (1.55 s) 100: 63 ADC Clock (3.15 s) 101: 127 ADC Clock (6.35 s) 110: 255 ADC Clock (12.75 s) 111: 511 ADC Clock (25.55 s) Reserved Reserved. Always set to 0.
3:0
Note: For A02 and earlier, this parameter also controls ALS-IR measurements.
ALS_VIS_ADC_GAIN @ 0x11 Bit Name Type Reset value = 0000 0000 Bit 7:4 Name Reserved Reserved. Increases the ADC integration time for ALS Visible measurements by a factor of (2 ^ ALS_VIS_ADC_GAIN). This allows visible light measurement under dark glass. For Example: 0x0: ADC Clock is divided by 1 0x4: ADC Clock is divided by 16 0x6: ADC Clock is divided by 64 Function 7 6 5 4 3 2 1 0
ALS_VIS_ADC_GAIN RW
3:0
ALS_VIS_ADC_GAIN
Note: For A02 and earlier, this parameter also controls ALS-IR measurements.
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ALS_VIS_ADC_MISC @ 0x12 Bit Name Type Reset value = 0000 0000 Bit 7:6 Name Reserved Reserved. Function 7 6 5 VIS_RANGE RW 4 3 2 1 0
5
When performing ALS-VIS measurements, the ADC can be programmed to operate in high sensitivity operation or high signal range. VIS_RANGE The high signal range is useful in operation under direct sunlight. 0: Normal Signal Range 1: High Signal Range (Gain divided by 14.5) Reserved Reserved.
4:0
Note: For A02 and earlier, this parameter also controls ALS-IR measurements.
ALS_HYST @ 0x16 Bit Name Type Reset value = 0100 1000 Bit 7:0 Name Function 7 6 5 4 ALS_HYST RW 3 2 1 0
ALS_HYST represents a hysteresis applied to the ALS_LOW_TH and ALS_HIGH_TH ALS_HYST thresholds. This is in an 8-bit compressed format, representing a 16-bit value. For example: 0x48: 24 ADC Codes
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PS_HYST @ 0x17 Bit Name Type Reset value = 0100 1000 Bit 7:0 Name Function 7 6 5 4 PS_HYST RW 3 2 1 0
PS_HYST represents a hysteresis applied to the PS1_TH, PS2_TH and PS3_TH threshPS_HYST olds. This is in an 8-bit compressed format, representing a 16-bit value. For example: 0x48: 24 ADC Codes.
PS_HISTORY @ 0x18 Bit Name Type Reset value = 0000 0011 Bit Name Function PS_HISTORY is a bit-field representing the number of consecutive samples exceeding the threshold and hysteresis to change status. For example: 0x03: 2 consecutive samples 0x07: 3 consecutive samples 0xFF: 8 consecutive samples 7 6 5 4 3 2 1 0
PS_HISTORY RW
7:0
PS_HISTORY
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ALS_HISTORY @ 0x19 Bit Name Type Reset value = 0000 0011 Bit Name Function ALS_HISTORY is a bit-field representing the number of consecutive samples exceeding the threshold and hysteresis to change status. For example: 0x03: Two consecutive samples 0x07: Three consecutive samples 0xFF: Eight consecutive samples 7 6 5 4 3 2 1 0
ALS_HISTORY RW
7:0
ALS_HISTORY
ADC_OFFSET @ 0x1A Bit Name Type Reset value = 1000 0000 Bit Name Function 7 6 5 4 3 2 1 0
ADC_OFFSET RW
7:0
ADC_OFFSET is an 8-bit compressed value representing a 16-bit value added to all measurements. Since most measurements are relative measurements involving a arithmetic subtraction and can result in a negative value. Since 0xFFFF is treated as an overrange indicator, the ADC_OFFSET is added so that the values reported in the I2C ADC_OFFSET register map are never confused with the 0xFFFF overrange indicator. For example: 0x60: Measurements have a 64-code offset 0x70: Measurements have a 128-code offset 0x80: Measurements have a 256-code offset
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LED_REC @ 0x1C Bit Name Type Reset value = 0000 0000 Bit 7:0 Name LED_REC Reserved. Function 7 6 5 4 LED_REC RW 3 2 1 0
ALS_IR_ADC_COUNTER @ 0x1D Bit Name Type Reset value = 0111 0000 Bit 7 Name Reserved Reserved. Recovery period the ADC takes before making a ALS-IR measurement. 000: 1 ADC Clock (50 ns) 001: 7 ADC Clock (350 ns) 010: 15 ADC Clock (750 ns) 011: 31 ADC Clock (1.55 s) 100: 63 ADC Clock (3.15 s) 101: 127 ADC Clock (6.35 s) 110: 255 ADC Clock (12.75 s) 111: 511 ADC Clock (25.55 s) Reserved (always set to 0). Function 7 6 5 IR_ADC_REC RW 4 3 2 1 0
6:4
IR_ADC_REC
3:0
Reserved
Note: This parameter available for sequencer revisions A03 or later.
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ALS_IR_ADC_GAIN @ 0x1E Bit Name Type Reset value = 0000 0000 Bit 7:4 Name Reserved Reserved. Increases the ADC integration time for IR Ambient measurements by a factor of (2 ^ ALS_IR_ADC_GAIN). For Example: 0x0: ADC Clock is divided by 1 0x4: ADC Clock is divided by 16 0x6: ADC Clock is divided by 64 Function 7 6 5 4 3 2 1 0
ALS_IR_ADC_GAIN RW
3:0
ALS_IR_ADC_GAIN
Note: This parameter available for sequencer revisions A03 or later.
ALS_IR_ADC_MISC @ 0x1F Bit Name Type Reset value = 0000 0100 Bit 7:6 Name Reserved Reserved. Function 7 6 5 IR_RANGE RW 4 3 2 1 0
5
When performing ALS-IR measurements, the ADC can be programmed to operate in high sensitivity operation or high signal range. IR_RANGE The high signal range is useful in operation under direct sunlight. 0: Normal Signal Range 1: High Signal Range (Gain divided by 14.5) Reserved Reserved: Write operations to this RAM parameter must preserve this bit-field value using read-modify-write.
4:0
Note: This parameter is available for sequencer revisions A03 or later.
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5. Pin Descriptions
DNC SDA SCL VDD INT 1 2 3 4 10 9 8 7 6 LED1 GND LED3 LED2
QFN-10
5 NC
Table 17. Pin Descriptions
Pin 1 2 3 Name SDA SCL VDD INT Type Bidirectional I2C Data. Input Power I2C Clock. Power Supply. Voltage source. Description
4
Interrupt Output. Bidirectional Open-drain interrupt output pin. Must be at logic level high during power-up sequence to enable low power operation. No Connect. This pin is not electrically connected to any internal SI1141/42/43 node.
1
5
NC
6
LED2
Output
LED2 Output.1 Programmable constant current sink normally connected to an infrared LED cathode. LED3 Output.2 Programmable constant current sink normally connected to an infrared LED cathode. If VLED < (VDD + 0.5 V), a 47 k pull-up resistor from LED3 to VDD is needed for proper operation. Connect directly to VDD when not in use. Ground. Reference voltage. LED1 Output. Programmable constant current sink normally connected to an infrared LED cathode. Do Not Connect. This pin is electrically connected to an internal SI1141/42/43 node. It should remain unconnected.
7
LED32
Output
8
GND
Power
9
LED1
Output
10
DNC
Notes: 1. Si1142 and Si1143 only. Connect to VDD in SI1141. 2. Si1143 only. Connect to VDD in SI1141 and Si1142.
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6. Ordering Guide
Part Number SI1141-A10-GM Si1142-A10-GM Si1143-A10-GM Package QFN-10 QFN-10 QFN-10 LED Drivers 1 2 3
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7. Package Outline: 10-Pin QFN
Figure 12 illustrates the package details for the SI1141/42/43 QFN package. Table 18 lists the values for the dimensions shown in the illustration.
Top View
Pin 1 Indication
Figure 12. QFN Package Diagram Dimensions Table 18. Package Diagram Dimensions Dimension
A b D e E L aaa bbb ccc ddd 0.30
Min
0.55 0.20
Nom
0.65 0.25 2.00 BSC. 0.50 BSC. 2.00 BSC. 0.35 0.10 0.10 0.08 0.10
Max
0.75 0.30
0.40
Notes: 1. All dimensions shown are in millimeters (mm). 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
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Pin 1
Small IR Photodiode Visible Photodiode (stacked photodiodes) Large IR Photodiode 0.19 0.70 0.18 0.35
0.59 1.21
Figure 13. Photodiode Centers
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DOCUMENT CHANGE LIST
Revision 0.2 to Revision 0.3

Updated "7. Package Outline: 10-Pin QFN" . Deleted Section 7.1. Deleted Section 7.2.
Updated document title from Si1140 to Si114x. Updated "7. Package Outline: 10-Pin QFN" on page 62. Updated Tables 2, 1, and 3. Added Figures 1, 3, and 4. Added register map and descriptions.
Revision 0.3 to Revision 0.4

Updated document title from Si114x to Si1143. Updated Applications Section Updated Tables 2 and 3. Updated Figure 1, Figure 4. Updated Table 8, Table 9. Updated Pin Assignments. Updated Register maps and description.
Revision 0.4 to Revision 0.41

Added SI1141 and Si1142 in addition to Si1143. Added the ODFN-8 package option. Some sections were rearranged. Added the signal-path software-model schematic. Renamed PARAM_IN to PARAM_WR for clarity. Renamed PARAM_OUT to PARAM_RD for clarity. Renamed PS_ADC_CLKDIV to PS_ADC_GAIN for clarity. Renamed ALS_VIS_ADC_CLKDIV to ALS_VIS_ADC_GAIN for clarity. Renamed ALS_IR_ADC_CLKDIV to ALS_IR_ADC_GAIN for clarity. Minor changes in register and parameter terminology.
Revision 0.41 to Revision 0.5

Updated Tables 1, 2, 3, and 15. Updated Figure 1. Added Figures 2 and 13. Updated register table reset values. Added " HW_KEY @ 0x07" register. Updated "ALS_VIS_ADC_MISC @ 0x12" register. Updated "ALS_IR_ADC_MISC @ 0x1F" register. Updated "6. Ordering Guide" . Updated " Features" . Updated " Description" . Updated "5. Pin Descriptions" . Updated "6. Ordering Guide" .
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NOTES:
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CONTACT INFORMATION
Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request.
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
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